1. Technical Field
The present invention relates to storage devices, display drivers, electro-optical devices, electronic apparatuses, and the like.
2. Related Art
In a display driver that includes a RAM (storage device) for storing display data, display data that is transferred to the display driver from a CPU (processing unit) is written into the RAM from a CPU-side port, the display data stored in the RAM is read out from a panel-side port, and a display panel is driven.
As an example of such a display driver including a RAM, a technique is disclosed in JP-A-2004-341217 in which pixel data is loaded from the RAM as a pixel data signal, pieces of the pixel data are distributed to corresponding segment electrodes, and segment driving voltages are applied to the segment electrodes, when display is performed in a double matrix liquid display. Also, a memory cell structure of a multiport SRAM is disclosed in JP-A-2008-211077, as an example of a RAM including multiple ports.
In a display driver including a RAM, a vertical write mode and a horizontal write mode are used as the write modes when display data is written into the RAM. In the vertical write mode, display data of multiple pixels that are on the same data line and on different scan lines are input to the display driver as a data unit, and the data unit is written into the RAM. In the horizontal write mode, display data of multiple pixels that are on the same scan line and on different data lines are input to the display driver as a data unit, and the data unit is written into the RAM.
In order to deal with two different write modes such as those described above, a conversion circuit that performs serial/parallel conversion, for example, of the display data to be input to the RAM before the display data is written into the RAM needs to be provided external to the RAM. For example, in the case of a RAM into which display data is written in units of 8 bits, display data of an amount that is 8 bits multiplied by 8 needs to be provided before the display data is written into the RAM. Therefore, there is a problem in that, because a clock whose cycle time is 8 times longer than that of the operation clock of the RAM is required, a circuit that generates the clock needs to be provided, or the current consumption increases.
Also, a method is conceivable in which a first RAM for the vertical write mode and a second RAM for the horizontal write mode are provided, and the RAM to be accessed is switched based on the write mode. However, in this method, two types of RAMs need to be provided, and as a result, the area occupied by the RAMs increases.